I. Field of the Invention
The present invention relates generally to a semiconductor integrated device and, more particularly, to a semiconductor integrated device having NPN and PNP power and logic devices combined with complementary MOS and DMOS devices, and to a method of manufacturing same.
II. Description of the Related Art
Integrated circuits having bipolar and MOS transistors formed on the same semiconductor substrate have many uses in the electronics industry and are therefore in great demand. The major advantage of such devices is that they combine the high power and fast switching speeds of bipolar devices with the high density and low power consumption of MOS transistors. The diversity of uses for such BiCMOS devices has fueled a surge toward fabricating faster, denser and more powerful integrated BiCMOS devices by more individual device enhancing manufacturing processes. This surge has resulted in the advent of SMART POWER BiCMOS integrated circuit devices. Smart power devices combine power and logic devices on the same IC substrate. The power devices previously employed in such smart power ICs have been vertical Diffused Channel MOS (DMOS) transistors. One of the major advantages of this DMOS/CMOS-bipolar technology is that higher logic densities have been possible while maintaining some power handling capabilities. The major drawback to this technology becoming widely used is that DMOS technology has proved to be less rugged than bipolar components. Another problem is that there appears to be a high voltage level at which DMOS power structures do not perform well. This high voltage level has generally been lower than levels achievable with discrete power devices.
There are several distinct reasons why high voltage bipolar transistors have not been combined with MOS in the prior art smart power ICs. One specific reason has been the absence of a process flow which can optimize the power handling characteristics of the bipolar transistors without adversely altering the characteristics of the desired analog/logic transistors. Another reason has been the inability to isolate bipolar power devices from other power devices and from the logic devices, and still maintain sufficient ground plane for proper IC logic operations.
Therefore it should be apparent that a need exist for a single process flow which enables fabrication of integrated circuits having complementary bipolar power and logic transistors and CMOS and DMOS transistors. A process which optimizes the desired operating characteristics of each of such devices and which does not otherwise suffer the detriments of existing fabrication processes.